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- 2026-09-12
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Synopsys, Inc. , the world leader in semiconductor design software, is pleased to announce the availability of IC Validator vX-2025.06 is a signoff physical verification solution that improves productivity for customers at all process nodes i.e., from mature to advanced.IC Validator physical verification is a comprehensive and high-
performance signoff solution that improves productivity for customers at all process nodes, from mature to advanced. IC Validator offers the industry’s best distributed processing scalability to over 4,000 CPU cores. The tool’s performance and scalability enabled some of the industry’s largest reticle limit chips with billions of transistors, same-day design rule checking (DRC), layout versus schematic (LVS), and fill turnaround time. IC Validator is seamlessly integrated with the Synopsys Fusion Compiler RTL-to-GDSII solution and IC Compiler II place and route system in the Fusion Design Platform. This integrated fusion technology accelerates design closure for manufacturing by enabling independent signoff-quality analysis and automatic repair within the implementation environment.Synopsys IC Validator 是新思科技（Synopsys）推出的高性能签核（Signoff）物理验证解决方案。作为 X-2025（vX-2025）版本，该工具进一步强化了对台积电（TSMC）N2/N3P 等最先进工艺节点的认证支持，并借助业界领先的分布式并行架构与 AI/机器学习技术，大幅缩短超大规模芯片从设计到交付（Tape-out）的物理验证周期。一、 核心功能与技术特性1. 全面物理验证：
– 支持完整的设计规则检查 (DRC)、版图与电路图一致性检查 (LVS)。
– 提供可制造性设计 (DFM) 验证、可编程电气规则检查 (PERC)
– 具备创新的时序驱动金属填挖（Dummy Fill）技术。2. 超强分布式并行扩展（Distributed Processing）：
– 支持在云端或本地服务器上将作业无缝分配到 4,000 个以上的 CPU 内核。
– 具备近乎线性的扩展能力，使得数十亿晶体管的超大芯片能在一天内（Overnight）完成签核验证。3. In-Design 融合技术（Live DRC & ADR）：
– 与 Fusion Compiler 和 IC Compiler II 布局布线系统实现原生深度整合。
– 物理设计阶段可直接在内存中调用 Live DRC，实现自动设计修复（ADR）。
– 避免了传统流程中反复导入/导出海量 GDSII/OASIS 数据带来的时间浪费。4. 尖端工艺与新架构支持：
– 全面支持 FinFET、环绕栅极（GAA/NanoSheet）工艺。
– 原生支持硅光子学（Silicon Photonics）验证及 3D-IC/多裸晶（Multi-die）系统的异构集成物理验证。5. Explorer 极速验证模式：
– 内置 Explorer DRC 与 Explorer LVS 创新技术。
– 在 SoC 顶层集成阶段提供高达 30 倍的 LVS 提速，并降低 30 倍的内存占用。——————————————————————————–
二、 核心优势对比
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* 验证周期：将传统先进工艺下耗时数天的 DRC/LVS 验证缩短至数小时或隔夜完成。
* 收敛效率：通过 In-Design ADR 与时序感知填挖，在布线阶段即时解决违规，避免后期破坏时序。
* 计算成本：引入弹性 CPU 管理技术，大幅降低硬件要求与内存占用，可节省高达 40% 的总拥有成本（TCO）。Learn how to run Design Rule Checks (DRC) using IC Validator.
Synopsys, Inc. is the world leader in electronic design automation (EDA) software for semiconductor design. The company delivers technology-leading semiconductor design and verification platforms and IC manufacturing software products to the global electronics market, enabling the development and production of complex systems-on-chips (SoCs). Synopsys also provides intellectual property and design services to simplify the design process and accelerate time-to-market for its customers. Synopsys is headquartered in Mountain View, California and has offices in more than 60 locations throughout North America, Europe, Japan and Asia.Сopyright holder \ Distributor: Synopsys, Inc.
Product Name: IC Validator
Version: vX-2025.06
Supported Architectures: x86_64
Website Home Page : http://www.synopsys.com
Languages Supported: english
System Requirements: Linux *
Size in archive: 13.7 Gb购买后，将显示帖子中所有出售内容。
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